.. toctree::
  :hidden:
  :numbered: 2
  :maxdepth: 2

  self
  Boolean_Basics/assignment.rst
  Bubble_KMaps/assignment.rst
  Sequential_Logic_Design/assignment.rst
  Finite_State_Machines/assignment.rst
  chapters/assignment_system_verilog.rst
  chapters/assignment_fpga.rst
  chapters/assignment_alu.rst
  chapters/assignment_stopwatch.rst
  chapters/assignment_aarch64.rst
  chapters/assignment_single_cycle.rst

.. toctree::
  :hidden:
  :numbered: 0
  :maxdepth: 2

.. include:: chapters/overview.rst