SC22 poster Tensor Processing Primitives in the Computational Sciences: Earthquake Simulations.

This year’s “The International Conference for High Performance Computing, Networking, Storage, and Analysis” (SC22) takes place in Dallas, TX from 11/13 - 11/18. As part of SC, we’ll present a research poster on Tensor Processing Primitives (TPPs) in the computational sciences. Our work formulates key kernels of a demanding solver in terms of TPPs. As shown in a thorough performance analysis, this approach leads to performance portability enabled by the TPP-backend LIBXSMM. In particular, the poster presents competitive application performance when running on a wide range of server processors: Intel Cascade Lake, Intel Ice Lake, Intel Sapphire Rapids, AMD Rome, AMD Milan, Amazon Graviton2, Fujitsu A64FX and Amazon Graviton3.

IPDPS22 and ISC22

Slides of the presentation Tensor Processing Primitives on Arm Processors at ISC22.

Last week was the time of two major parallel computing and HPC events, the 36th IEEE International Parallel & Distributed Processing Symposium (IPDPS) and ISC High Performance 2022 (ISC22).

Our lab presented the research paper Next-Generation Local Time Stepping for the ADER-DG Finite Element Method at IPDPS (slides). Further, we presented the current status of bringing tensor processing primitives to Arm processors at the 4th Annual Arm HPC Users Group Workshop. The discussed results include the performance of JITted small matrix multiplication kernels for a large range of processors, i.e., Fujitsu’s A64FX (ASIMD and SVE), Ampere’s Altra (ASIMD), Amazon’s Graviton2 (ASIMD) and Graviton3 (ASIMD and SVE), and Apple’s M1 (ASIMD and AMX). As can be seen in the slides of the presentation, our added support for the best-suited extensions of the Arm Architecture is crucial for unleashing the full potential of the respective processors.

Next-Generation Local Time Stepping

The work Next-Generation Local Time Stepping for the ADER-DG Finite Element Method enhances the solver EDGE across the entire modeling and simulation spectrum. A core contribution is the presented new and highly efficient local time stepping scheme for the ADER-DG finite element method. This schemes outperforms the previous state of the art by 1.48x in a common setup. Additional contributions cover the incorporation of the anelastic wave equations into the solver, a new communication scheme which minimizes the pressure on the memory and network, and an end-to-end preprocessing pipeline which enables efficient and large scale high-frequency ground motion simulations.

Our study of EDGE’s fused simulation capabilities shows a parallel efficiency of over 95% when strong scaling from 256 nodes to 1,536 nodes of the Frontera supercomputer. Ultimately, we were able to improve the solver’s single-simulation time-to-solution of a demanding setup by over 10x. For this setup we achieved a hardware performance 1.91 non-zero FP32-PFLOPS on 1,536 nodes (86,016 cores) underlining EDGE’s unprecedented computational efficiency, algorithmic efficiency and scalability.

The final version of this work will be presented at the 36th IEEE International Parallel & Distributed Processing Symposium (IPDPS). IPDPS 2022 will be a virtual conference happening in the time frame from May 30 - June 3.

Preprint: Next-Generation Local Time Stepping for the ADER-DG Finite Element Method

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